The amount of heat generated by a semiconductor device, or chip, is related to the number of transistors on the device and the clock speeds at which they are operated. As more and more transistors are fabricated onto a single semiconductor device, the overall amount of heat generated by the device is increased. Similarly, the faster the transistors on the chip are operated, the more heat is generated by the device. Since advances in semiconductor fabrication technology continue to make possible both increased transistor density and higher clock speeds, the problem of heat generation is becoming increasingly severe, particularly in high performance devices which push the limits of fabrication technology.
As an increasing amount of heat is generated by the device, the junction temperatures of the transistors in the device increases proportionately. The failure rate of a semiconductor device is directly related to the junction temperature at which it is operated. The higher the junction temperature, the higher the failure rate.
It is generally known to provide a heat spreader or heat sink for a semiconductor device in order to transfer the generated heat away from the device itself and into the surrounding air, thus reducing the junction temperature. Heat sinks generally are located as physically close to the semiconductor device as possible in order to maximize the amount of heat transferred. Heat sinks typically are constructed from a high thermal conductivity material, such as copper, aluminum or high thermal conductivity plastic, and are designed to present a maximum amount of surface area to the ambient air in order to allow the heat generated by the semiconductor device to be removed, either by natural or forced convection.
One way that heat sinks increase the amount of surface available for heat dissipation is to provide a plurality of parallel cooling fins which rise vertically from a horizontal surface, or base member. One conventional heat sink is shown in FIG. 1. In this example, the heat sink 100 includes a base member 102, having a base surface 103 which is attachable to a corresponding surface of the semiconductor package. Heat sink 100 is also provided with a heat dissipating surface 105. In this case, the surface 105 includes fins 104a, 104b, 104c and 104d which provide greater surface area for convection cooling. Other designs include a plurality of cooling pins which rise from the base member. Numerous types of pins are known in the art having cross-sections of various shapes. Forced convection may be provided by a fan which passes air over a circuit board to which the packaged semiconductor is mounted, or, in some cases, a fan may be mounted directly onto the top of the heat sink fins themselves.
Regardless of the exact type of heat sink employed, modern semiconductor packaging technologies present numerous challenges to provide heat sinks, and methods for attaching heat sinks, in commercially practical applications. For example, one common type of package is the encapsulated package, shown in cross-section in FIG. 2. The particular encapsulated package shown is referred to as a ball grid array ("BGA"). In this case, the semiconductor die 200 is attached to a substrate 204 by a suitable adhesive, or die attach material 206. Substrate 204 is typically of laminar construction and various conductive paths are formed on individual layers. Electrical connection between the individual layers is provided by vias in the substrate. Electrical connection between the I/O bond pads on the die 200 and conductive paths provided on the substrate 204 is provided by bond wires 202. The conductive paths on substrate 204 are coupled to solder balls 208 which provide electrical connection to a printed circuit board ("PCB"). In order to protect the delicate bond wires 202, the chip is encapsulated with, for example, epoxy 210 to form what is sometimes referred to as a "glob-top." Similar encapsulated packages include, for example, pin grid array packages ("PGA") which provide cylindrical pins in place of the solder balls 208 shown in the figure.
Typically, the substrate 204 is constructed from either a ceramic material, in which case the package is referred to as a ceramic ball grid array ("CBGA"), or a plastic material, in which case the package is referred to as a plastic ball grid array ("PBGA"). While the ceramic substrates offer certain advantages over plastic substrates with respect to heat conductivity, mechanical strength and moisture resistance, plastic substrates are being increasingly used because of lower manufacturing costs and their ability to provide thinner overall packages. Moreover, advances in manufacturing have improved the plastic substrates relative to their ceramic counterparts. For example, improvements in sealing the laminar layers of the plastic substrates have made them almost as moisture resistant as ceramic substrates.
The thermal resistance to the heat transfer from the transistor junctions on the die to the ambient air is the sum of the thermal resistance in the junction-to-case thermal path and the case-to-ambient path. This is expressed as: EQU .theta..sub.JA =.theta..sub.JC +.theta..sub.CA
where .theta..sub.JA is the total thermal resistance from the device junctions to the ambient, typically expressed in degrees Celsius per watt (.degree. C./W), .theta..sub.JC is the thermal resistance of the heat transfer path from the device junctions to the case, and .theta..sub.CA is the thermal resistance of the heat transfer path from the case to the ambient. The thermal resistance of a heat transfer path is, in turn, a function of the thickness of the material which makes up the path divided by the product of a coefficient of thermal conductivity of the material and the area of the material. This is expressed as: EQU .theta.=t/kA
where .theta. is the thermal resistance, t is the thickness of the material in the heat transfer direction, k is the coefficient of thermal conductivity of the material, and A is the cross-sectional area of the material layer normal to the heat transfer direction.
In general, the components used in manufacturing semiconductor packages have poor thermal properties. For example, although there is some variance between different types, epoxy, which is used to attach structures such as heat sinks, dam rings and heat spreaders, has a very low thermal conductivity. Thus, even if a heat sink is attached to a package, the thermal resistance of the epoxy reduces the efficiency of the heat transfer. A similar problem occurs with the encapsulant used to cover the semiconductor die in encapsulated semiconductor packages, such as that shown in FIG. 1.
Accordingly, it is an object of the present invention to provide a method and apparatus which overcomes the above mentioned problems. It is another object of the invention to provide a coating for semiconductor packages which improves heat transfer from the semiconductor die to the ambient. Still further objects and advantages of the present invention will become apparent in view of the following disclosure.